Careers

Senior Software Engineer - EDA

Job Description: 

We are currently engaged in several development/training projects with large semiconductor houses and Design Automation Software companies. We are looking for senior Software engineers for our clients in Bangalore to contribute in the following areas:

  • System Infrastructure tools and methodology (regression automation)
  • EDA development and EDA flows
  • System-On-Chip (SOC) tools implementation
  • VIP Support
  • Tools for Emulation
  • Cloud based verification tools

As a senior software engineer, you will be responsible for independently specifying, executing and delivering projects at the customer site. This includes:

  • working closely with chip teams to actively track the software and IP releases and enable the quality flows
  • provide support for internal EDA tools
  • implement new features for proprietary tools and flows
  • implementing automatic tracking systems for IP consistency.
  • implementing innovative solutions to enhance the quality assurance flow
Educational Qualfications: 
Masters or Bachelors degree in Computer Science/ Computer Engineering or Electronics Engineering
Required Experience: 
1 to 3 years software development experience in C++/PERL
Job Location: 
Bangalore, India
Required skills: 
  • Good understanding of parser technology including Bison, ANTLR
  • Familiary with version control systems like Clearcase and SVN
  • Experience with EDA software tool development
  • At least one software language (such as C++/Java/Perl/Python)
  • Familiarity with a database system (such as MySQL or MongoDB)
  • Familiarity with at least one HDL such as VHDL/Verilog/SystemVerilog/SystemC
  • Good communication and leadership skills to interface with customer
  • Enthusiasm and self-motivation to learn new technologies

Formal Verification Engineer

Job Description: 

We are looking for RTL design engineers to work with our clients in the area of formal verification. You will be required to help design, implement and execute formal end-to-end formal verification flows, including specification, development, testing and documentation

Educational Qualfications: 
Masters or Ph.D degree in Computer Science, Computer Engineering or Electronics Engineering
Required Experience: 
3 to 5 years experience in Formal Verification
Job Location: 
Bangalore, India
Required skills: 
  • Knowledge of software languages like Perl/Tcl/Java
  • Expertise in SystemVerilog Assertions coding
  • Experience in working on assertions, formal verification checks, equivalence checks
  • Good understanding of formal verification algorithms and techniques
  • 3-5 years experience with industry standard formal verification tools

RTL design engineer

Job Description: 

We are looking for engineers with RTL design expertise to help support our clients areas of RTL to GDSII flow

  • Synthesis
  • Static Timing Analysis
  • Signal Integrity
  • Timing correlation
  • Clock Domain Crossing
  • Design rule checks
Educational Qualfications: 
Masters or Bachelors degree in Computer Science/ Computer Engineering. or Electronics Engineering
Required Experience: 
3 to 5 years experience in ASIC design
Job Location: 
Bangalore, India
Required skills: 
  • 3-5 yrs experience in RTL design with Verilog
  • Must have atleast 2 years of work experience in working on one of the following technologies
    • Gate Level Synthesis,
    • State Timing Analysis
    • Signal Integrity,
    • Timing correlation,
    • Clock Domain Crossing
    • Design rule Checks
    • Low power checks
    • . Should have used industry standard tools like Design Compiler, Prime Time, Conformal, Spyglass
    • Good communication and leadership skills to interface with customer
    • Enthusiasm and self-motivation to learn new technologies

Senior Verification Engineer

Job Description: 

We are currently engaged in several verification projects with large semiconductor houses. We are looking for senior Verification Engineers for our clients in Bangalore. As a senior verification engineer, you will be responsible for:

  • Creation of verification plans
  • Implementation of testbench environments in OVM/UVM
  • Understanding how to use commercially available VIPs necessary for the protocols used in the design
  • Implementation of sequences and virtual sequences
  • Configuring uvm_config_db database correctly (for each test)
  • Creation of multiple tests based on the verification plan
  • Implementation of the scoreboard
  • Definition and implementation of the functional and code coverage plans
  • Definition and implementation of the assertion plan
  • Migration of the verification environment to SOC level
Educational Qualfications: 
Masters or Bachelors degree in Computer Science/ Computer Engineering or Electronics Engineering
Required Experience: 
2 to 5 years experience in block level or SOC level verification
Job Location: 
Bangalore, India
Required skills: 

In order to be successful the right candidate is expected to have:

  • At least 2 years of verification experience dealing with complex blocks or SOCs
  • Proven expertise in OVM or UVM
  • Experience with at least one of the leading simulators in the industry
  • Ability to debug SystemVerilog code using state-of-the-art debugging techniques
  • Knowledge of common protocols such as (PCIE, AXI, USB)
  • Previous experience with commercial Verification IPs (VIPs)